2020-2021 Sunseeker Telemetry and Lighting System
mpu_ex2_twoSeg.c
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32 //******************************************************************************
33 // MSP430FR59x Demo - MPU Write protection violation - Interrupt notification
34 //
35 // Description: The MPU segment boundaries are defined by:
36 // Border 1 = 0x8000 [MPUSEGB1 = 0x0800]
37 // Segment 1 = 0x4400 - 0x7FFF
38 // Segment 2 = 0x8000 - 0x13FFF
39 // Segment 2 is write protected. Any write to an address in the segment 2 range
40 // causes a PUC. The LED toggles after accessing SYS NMI ISR.
41 //
42 // ACLK = n/a, MCLK = SMCLK = default DCO
43 //
44 //
45 // MSP430FR5969
46 // ---------------
47 // /|\| |
48 // | | |
49 // --|RST |
50 // | |
51 // | P1.0|-->LED
52 //
53 //******************************************************************************
54 
55 #include "driverlib.h"
56 
57 uint8_t SYSNMIflag = 0;
58 uint16_t *ptr = 0;
59 uint16_t Data =0;
60 
61 void main(void)
62 {
63  // Stop WDT
64  WDT_A_hold(WDT_A_BASE);
65 
66  // Configure P1.0 for LED
67  GPIO_setAsOutputPin(
68  GPIO_PORT_P1,
69  GPIO_PIN0);
70 
71  /*
72  * Disable the GPIO power-on default high-impedance mode to activate
73  * previously configured port settings
74  */
75  PMM_unlockLPM5();
76 
77  // Configure MPU
78  MPU_initTwoSegments(MPU_BASE, 0x0800, MPU_READ|MPU_WRITE|MPU_EXEC, MPU_READ);
79 
80  MPU_disablePUCOnViolation(MPU_BASE,MPU_SECOND_SEG);
81 
82  MPU_enableNMIevent(MPU_BASE);
83  MPU_start(MPU_BASE);
84 
85  Data = 0x88;
86 
87  // Cause an MPU violation by writing to segment 2+
88  ptr = (uint16_t *)0x8002;
89  *ptr = Data;
90 
91  __delay_cycles(100);
92 
93  while(SYSNMIflag)
94  {
95  GPIO_toggleOutputOnPin(
96  GPIO_PORT_P1,
97  GPIO_PIN0
98  );
99  __delay_cycles(100000);
100  }
101 
102  // No violation - trap here
103  while(1);
104 }
105 
106 // Sys NMI vector
107 #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
108 #pragma vector=SYSNMI_VECTOR
109 __interrupt
110 #elif defined(__GNUC__)
111 __attribute__((interrupt(SYSNMI_VECTOR)))
112 #endif
113 void SYSNMI_ISR(void)
114 {
115  switch(__even_in_range(SYSSNIV,0x18))
116  {
117  case 0x00: break;
118  case 0x02: break;
119  case 0x04: break;
120  case 0x06: break;
121  case 0x08: break;
122  case 0x0A: break;
123  case 0x0C: break; //MPUSEG1IFG
124  case 0x0E: //MPUSEG2IFG
125  // Clear violation interrupt flag
126  SYSNMIflag = 1; // Set flag
127  break;
128  case 0x10: break; // MPUSEG3IFG
129  case 0x12: break;
130  case 0x14: break;
131  case 0x16: break;
132  case 0x18: break;
133  default: break;
134  }
135 }
void main(void)
uint16_t * ptr
uint16_t Data
MPU_start(MPU_BASE)
uint8_t SYSNMIflag
void SYSNMI_ISR(void)
MPU_disablePUCOnViolation(MPU_BASE, MPU_SECOND_SEG)
MPU_enableNMIevent(MPU_BASE)
__delay_cycles(500000)